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AtlasRepo

GSoC'26_Week13 : Auto Layout

Description and use

Automatic component layout in CircuitVerse when layout data is missing, using ELK.js and temporary junctions for fan‑out nets, with stacked PRs in GitHub to streamline code review.

Problem

Implement automatic layout for CircuitVerse circuits while preserving existing layout data and handling complex fan‑out nets.

Outcome

Auto Layout now generates clean, readable circuit arrangements when layout data is missing, handles fan‑out nets without leaking ELK specifics, and integrates smoothly into the editor. Stacked PRs improved code review clarity.

Workflow

  • 1. Detect missing layout data in the imported circuit.
  • 2. Instantiate components to determine size, direction, and port positions.
  • 3. Convert the circuit into an ELK graph and apply the layered layout algorithm.
  • 4. Route wires orthogonally, creating temporary zero‑size junctions for fan‑out nets.
  • 5. Convert ELK junctions and bend points back into CircuitVerse routing nodes.
  • 6. Snap coordinates to the simulator grid and continue the normal import flow.
  • 7. Preserve existing layout data when present, otherwise use the generated layout.

Evidence

I finished the Auto Layout feature.

Source

I used ELK.js with its layered layout algorithm.

Source

  • Record date: 2026-09-05T18:45:17.584Z